Semiconductor device and manufacturing method thereof

ABSTRACT

To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.

TECHNICAL FIELD

The present invention relates to a semiconductor device using ZnO (ZincOxide) and a manufacturing method thereof.

BACKGROUND ART

A semiconductor device used for a display panel of a liquid crystaldisplay device or an EL (Electroluminescent) display device, forexample, a semiconductor portion of a TFT (Thin Film Transistor), isgenerally formed by using a-Si (amorphous silicon) or poly-Si(polycrystalline silicon).

Si (silicon) does not have a large band gap (for example,single-crystalline Si is 1.1 eV), and absorbs visible light. Byirradiation with the light, electrons and holes (carriers) are formed inSi. If a Si film is used for a channel formation region of a TFT, acarrier is generated in the channel formation region by irradiation withthe light even in an OFF state. Then, current flows between a sourceregion and a drain region. The current which flows in an OFF state iscalled “OFF-leak current”. If the current value is high, a display paneldoes not operate normally. Consequently, a light shielding film isformed so as not to irradiate the Si film with light. However, a processbecomes complex when the light shielding film is formed, because adeposition step, a photolithography step, and an etching step arerequired.

To solve the problem, an attention is paid to a transparent transistorusing zinc oxide (ZnO) which is a semiconductor having a larger band gapof 3.4 eV than that of Si. Concerning such a transparent transistor, theband gap is larger than light energy in a visible light band and thevisible light is not absorbed. Consequently, it has an advantage thatthe OFF-leak current does not increase if irradiated with light.

A semiconductor device using ZnO for the channel formation region isdisclosed in Reference 1, for example. The structure of thesemiconductor device using ZnO is described referring to FIG. 7A.

A semiconductor device in FIG. 7A has a source electrode 1001 and adrain electrode 1002, a ZnO layer 1003 arranged so as to be contactedwith the source electrode 1001 and the drain electrode 1002, and a gateinsulating layer 1004 stacked over the ZnO layer 1003 and a gateelectrode 1005 over an insulating substrate 1000 such as a glasssubstrate.

For the source electrode 1001 and the drain electrode 1002, a conductiveZnO is used. The conductive ZnO is doped with one of the following: B(boron), Al (aluminum), Ga (gallium), In (indium), or Tl (thallium),which are III group elements; F (fluorine), Cl (chlorine), Br (bromine),or I (iodine), which are VII group elements; Li (lithium), Na (sodium),K (potassium), Rb (rubidium), or Cs (caesium), which are I groupelements; and N (nitrogen), P (phosphorus), As (arsenic), Sb (antimony),or Bi (bismuth), which are V group elements.

[Reference 1] Japanese Published Patent Application No. 2000-150900DISCLOSURE OF INVENTION

According to the examination by the present inventor, it was revealedthat the substrate 1000 is etched in some cases when the sourceelectrode 1001 and the drain electrode 1002 of the top gatesemiconductor device shown in FIG. 7A is formed by etching. Even in thecase of forming a base film 1006 formed by using a silicon oxide film ora silicon oxynitride film on the substrate 1000, the surface of thesubstrate 1000 is exposed in some cases when the base film is etched. Inaddition, in the case of a bottom gate semiconductor device shown inFIG. 7B, it is revealed that a gate insulating film 1004 formed by usinga silicon oxide film or a silicon oxynitride film is etched when asource electrode 1001 and a drain electrode 1002 are formed by etching.

It the case of the top gate semiconductor device, when the glasssubstrate 1000 or the base film 1006 formed by using a silicon oxidefilm or a silicon oxynitride film is etched, an impurity such as sodiumis diffused into a semiconductor film 1003 from the substrate 1000, sothat characteristics are deteriorated.

In the case of the bottom gate semiconductor device (FIG. 7B), if thegate insulating film 1004 is etched when the source electrode 1001 andthe drain electrode 1002 are formed by etching, the characteristics arenot stable and causes a fault.

In consideration of the above situation, it is an object of the presentinvention to provide a semiconductor device in which a defect or a faultis not generated and a manufacturing method thereof even if a ZnOsemiconductor film is used for the channel formation region, and a ZnOfilm to which an n-type or p-type impurity is added is used for thesource electrode and the drain electrode.

An aspect of a semiconductor device of this invention has an Al film oran Al alloy film over a silicon oxide film or a silicon oxynitride film,and a ZnO film to which an n-type or p-type impurity is added over theAl film or the Al alloy film. “A silicon oxide film”, “a siliconoxynitride film”, “an Al film”, “an Al alloy film” and “a ZnO film” inthis specification means a film containing silicon oxide, a filmcontaining silicon oxynitride, a film containing Al, a film containingAl alloy, a film containing ZnO, respectively.

An aspect of a semiconductor device of this invention has a gateinsulating film formed by using a silicon oxide film or a siliconoxynitride film over a gate electrode, an Al film or an Al alloy filmover the gate insulating film, a ZnO film to which an n-type or p-typeimpurity is added over the Al film or the Al alloy film, and a ZnOsemiconductor film over the ZnO film to which an n-type or p-typeimpurity is added and the gate insulating film.

An aspect of a semiconductor device of this invention has an Al film oran Al alloy film over a silicon oxide film or a silicon oxynitride film,a ZnO film to which an n-type or p-type impurity is added over the Alfilm or the Al alloy film, a ZnO semiconductor film over the siliconoxide film or the silicon oxynitride film and the ZnO film to which ann-type or p-type impurity is added, a gate insulating film over the ZnOsemiconductor film, and a gate electrode over the gate insulating film.

An aspect of a manufacturing method of a semiconductor device of thisinvention has the steps of: forming a silicon oxide film or a siliconoxynitride film; forming an Al film or an Al alloy film over the siliconoxide film or the silicon oxynitride film; forming a ZnO film to whichan n-type or p-type impurity is added over the Al film or the Al alloyfilm, wherein the ZnO film to which an n-type or p-type impurity isadded is etched to have an island-like shape by a first etching, and theAl film or the Al alloy film is etched to have an island-like shape by asecond etching.

An aspect of a manufacturing method of a semiconductor device of thisinvention, wherein a ZnO semiconductor film is formed over the ZnO filmto which an n-type or p-type impurity is added, and the silicon oxidefilm or the silicon oxynitride film after the second etching.

In the case of the bottom gate semiconductor device, a gate insulatingfilm formed by using the silicon oxide film or the silicon oxynitridefilm is formed over the gate electrode after forming a gate electrode.

In the case of the top gate semiconductor device, a gate insulating filmis formed and a gate electrode is formed after the ZnO semiconductorfilm is formed.

A first etching of this invention may be wet etching.

A first etching of this invention may be wet etching using bufferedfluoric acid.

A first etching of this invention may be dry etching.

A first etching of this invention may be dry etching using CH₄ (methane)gas

A second etching of this invention may be wet etching.

A second etching of this invention may be wet etching using developingsolution for a photoresist.

A second etching of this invention may be wet etching using an organicalkaline solution.

A second etching of this invention may be wet etching using TMAH(tetramethylammonium hydroxide).

An aspect of a semiconductor device of this invention has a gateelectrode, a gate insulating film over the gate electrode, a first filmcomprising metal material over the gate insulating film, a second filmcomprising a transparent semiconductor material and an n-type or p-typeimpurity over the first film, and a third film comprising thetransparent semiconductor material over the second film and the gateinsulating film.

An aspect of a semiconductor device of this invention has an insulatingfilm over a substrate, a first film comprising a metal material over theinsulating film, a second film comprising a transparent semiconductormaterial and an n-type or p-type impurity over the metal film, a thirdfilm comprising the transparent semiconductor material over theinsulating film and the second film, a gate insulating film over thethird film, and a gate electrode over the gate insulating film.

An aspect of a manufacturing method of a semiconductor device of thisinvention has the steps of: forming an insulating film over a substrate,forming a first film comprising a metal material over the insulatingfilm, forming a second film comprising a transparent semiconductormaterial and an n-type or p-type impurity over the first film, etchingthe second film, and etching the first film.

An aspect of a manufacturing method of a semiconductor device of thisinvention has the steps of: forming a gate electrode over a substrate,forming a gate insulating film over the gate electrode, forming a firstfilm comprising a metal material over the gate insulating film, forminga second film comprising a transparent semiconductor material and ann-type or p-type impurity over second film, etching the second film, andetching the first film.

In the top gate semiconductor device, a base film formed by using aglass substrate, a silicon oxide film or a silicon oxynitride film isnot etched, and an impurity such as sodium is not diffused from asubstrate into a semiconductor film so that its characteristics are notdeteriorated.

In the bottom gate semiconductor device, the gate insulating film is notetched and its characteristics do not become unstable.

Since Al is used for a part of the source electrode and drain electrode,low resistance of a wire can be obtained.

BRIEF DESCRIPTION OF DRAWINGS

In the accompanying drawings:

FIGS. 1A and 1B show semiconductor devices of this invention;

FIGS. 2A to 2D show manufacturing steps of a semiconductor device ofthis invention;

FIGS. 3A to 3D show manufacturing steps of a semiconductor device ofthis invention;

FIGS. 4A and 4B show manufacturing steps of a semiconductor device ofthis invention;

FIGS. 5A to 5D show manufacturing steps of a semiconductor device ofthis invention;

FIGS. 6A to 6C show manufacturing steps of a semiconductor device ofthis invention;

FIGS. 7A and 7B show conventional examples;

FIGS. 8A and 8B show a manufacturing step of a liquid crystal displaydevice;

FIGS. 9A and 9B show manufacturing steps of a liquid crystal displaydevice;

FIGS. 10A and 10B show manufacturing steps of a light-emitting device;

FIGS. 11A and 11B show manufacturing steps of a light-emitting device;

FIGS. 12A to 12F each show an equivalent circuit of a light-emittingdevice;

FIG. 13 shows an equivalent circuit of a light-emitting device;

FIG. 14A illustrates a top front view of a pixel portion and FIG. 14Billustrates an equivalent circuit of a light-emitting device;

FIGS. 15A to 15E each show an example of an electronic apparatus towhich this invention is applied; and

FIG. 16 shows an example of electronic apparatuses to which thisinvention is applied.

The embodiments of this invention will be described hereinafterreferring to the accompanying drawings. Note that this invention is notlimited to the description below, and it is easily understood by thoseskilled in the art that the embodiments and details herein disclosed canbe modified in various ways without departing from the purpose and thescope of the invention. Therefore, this invention should not beinterpreted as being limited to the description of the embodiments to begiven below.

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1

Here, a bottom gate semiconductor device is described.

FIG. 1A is a cross-sectional view in which one example of the embodimentof this invention is shown. In FIG. 1A, numeral reference 1 denotes asubstrate, 3 denotes a gate electrode, 5 denotes a gate insulating film,10 denotes a source electrode, 10 a denotes a first conductive film, 10b denotes a second conductive film, 11 denotes a drain electrode, 11 adenotes a first conductive film, 11 b denotes a second conductive film,and 13 denotes a semiconductor film. An insulating film for passivationor planarization may be formed over the semiconductor film 13.

The gate electrode 3 is formed over the substrate 1, the gate insulatingfilm 5 is formed over the gate electrode 3, and the source electrode 10and the drain electrode 11 are formed over the gate insulating film 5.The source electrode 10 is formed of a layered film having the firstconductive film 10 a and the second conductive film 10 b, and the drainelectrode 11 is formed of a layered film having the first conductivefilm 11 a and the second conductive film 11 b. A third conductive filmmay be formed between the first conductive film 10 a and the secondconductive film 10 b, or between the first conductive film 11 a and thesecond conductive film 11 b. The source electrode 10 and the drainelectrode 11 may be each formed so as to overlap partially with the gateelectrode 3 through the gate insulating film 5. The semiconductor film13 is formed over the source electrode 10 and the drain electrode 11over the gate insulating film 5.

Hereinafter, each structure is described.

(1) Substrate

The following can be used for forming a substrate: a substrate formed byusing a glass substrate; an insulating material such as alumina; and aplastic substrate which can resist a processing temperature inpost-steps; and the like. In the case of using a plastic substrate forthe substrate 1, the following can be used: PC (polycarbonate); PES(polyethersulfone); PET (polyethylene terephthalate); PEN (polyethylenenaphthalate); or the like. In the case of the plastic substrate, aninorganic layer or an organic layer may be provided as a gas barrierlayer over the surface. In the case where a prominence due to dust orthe like which is generated on the substrate in the manufacturingprocess of the plastic substrate, the substrate may be used afterpolishing it with CMP or the like to make its surface planarized. Aninsulating film such as silicon oxide (SiOx), silicon nitride (SiNx),silicon oxynitride (SiOxNy) (X>Y), and silicon nitride oxide (SiNxOy)(X>Y) may be formed over the substrate 1 for preventing an impurity orthe like from diffusing from the substrate side.

(2) Gate Electrode

A gate electrode can be formed by using an Al (aluminum) film, a W(tungsten) film, a Mo (molybdenum) film, a Ta (tantalum) film, a Cu(copper) film, a Ti (titanium) film, an alloy material containing theelements as a main component (for example, an Al alloy film, a MoW(molybdenum tungsten) alloy film), or the like. A semiconductor filmrepresented by a polycrystalline silicon film doped with an impurityelement such as P (phosphourus) may be used. The gate electrode 3 may bea single layer or a layered film in which two or more layers arestacked.

(3) Gate Insulating Film

The gate insulating film 5 is formed by using an insulating filmcontaining silicon as a main component, for example, silicon oxide film,and silicon oxynitride film. In addition, it may be a single layer or alayered film.

(4) Source Electrode and Drain Electrode

The source electrode 10 is formed with a layered film of the firstconductive film 10 a and the second conductive film 10 b, and the drainelectrode 11 is formed with a layered film of the first conductive film11 a and the second conductive film 11 b.

As the first conductive film, an Al film, an Al alloy film such as anAlNi (aluminum nickel) film, and an AlNd (neodymium aluminum) film canbe used. As the second conductive film, ZnO (zinc oxide) to which ap-type or n-type impurity of B (boron), Al (aluminum), Ga (gallium), P(phosphorus), or As (arsenic) is added can be used. A metal film such asa Ti film may be provided as a third conductive film between the firstconductive film and the second conductive film.

(5) Semiconductor Film

A ZnO film is used as a semiconductor film. Since the source electrodeand the drain electrode contacted with the semiconductor film have theZnO film to which a p-type or n-type impurity is added, they can beeasily connected with the semiconductor film.

(6) Insulating Film

An insulating film such as a passivation film and a planarization filmmay be formed over the semiconductor film 13, although not shown.Silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride(SiOxNy) (x>y), silicon nitride oxide (SiNxOy) (x>y), a SOG(spin-on-glass) film, or an organic resin film of acryl, or a layeredfilm of those can be used.

In the bottom gate semiconductor device, a gate insulating film is notetched in manufacturing process, and characteristics do not becomeunstable. Al is used for a part of the source electrode and the drainelectrode, thereby achieving lower resistance of a wire.

Embodiment 2

Here, a top gate semiconductor device is described.

FIG. 1B is a cross-sectional view showing one example of an embodimentof this invention. In FIG. 1B, numeral reference 1 denotes a substrate,20 denotes an insulating film, 25 denotes a source electrode, 25 adenotes a first conductive film, 25 b denotes a second conductive film,26 denotes a drain electrode, 26 a denotes a first conductive film, 26 bdenotes a second conductive film, 27 denotes a semiconductor film, 28denotes a gate insulating film, and 29 denotes a gate electrode. Aninsulating film for passivation or planarization may be formed over thegate electrode.

The insulating film 20 is formed on the substrate 1, and the sourceelectrode 25 and the drain electrode 26 are formed over the insulatingfilm 20. The source electrode 25 is formed with a layered film of thefirst conductive film 25 a and the second conductive film 25 b, and thedrain electrode 26 is formed with a layered film of the first conductivefilm 26 a and the second conductive film 26 b. A third conductive filmmay be formed between the first conductive film 25 a and the secondconductive film 25 b, or between the first conductive film 26 a and thesecond conductive film 26 b. The semiconductor film 27 is formed overthe source electrode 25 and the drain electrode 26 over the insulatingfilm 20, the gate insulating film 28 is formed over the semiconductorfilm 27, and the gate electrode 29 is formed over the gate insulatingfilm 28. The gate electrode 29 may be formed so as to partially overlapwith the source electrode and the drain electrode with the gateinsulating film 28 and the semiconductor film 27 interposedtherebetween.

Here, each structure is described.

For the substrate, the source electrode, the drain electrode, thesemiconductor film, and the gate electrode, the same ones described inEmbodiment 1 can be used.

(1) Insulating Film Over Substrate

An silicon oxide film or a silicon oxynitride film is formed as theinsulating film 20 for preventing an impurity or the like from diffusingfrom the substrate side over the substrate 1. In addition, it may be asingle layer or a layered film.

(2) Gate Insulating Film

The gate insulating film 28 is formed by using an insulating filmcontaining silicon as a main component, for example, a silicon oxidefilm, a silicon oxynitride film, a silicon nitride oxide film, and asilicon nitride film. In addition, it may be a single layer or a layeredfilm.

(3) Insulating Film Over Gate Electrode

An interlayer insulating film such as a passivation film and aplanarization film may be formed over the gate electrode 29, althoughnot shown. A SiO_(x) film, a SiNx film, a SiON film, SiNO film, an SOG(spin-on-glass) film, and an organic resin film of acrylic or a layeredfilm of those can be used.

In the top gate semiconductor device, the substrate or the base filmformed by using a silicon oxide film or a silicon oxynitride film is notetched, so that an impurity such as sodium is not diffused into thesemiconductor film from the substrate and the characteristics are notdeteriorated. Al is used for a part of the source electrode and thedrain electrode, thereby achieving lower resistance of a wire.

Embodiment 3

A manufacturing method of the bottom gate semiconductor device isdescribed, in which a silicon oxide film or a silicon oxynitride film isformed as a gate insulating film over the gate electrode, an Al film oran Al alloy film is formed as a first conductive film, and a ZnO film towhich an n-type or p-type impurity is added is formed as a secondconductive film, and then, the second conductive film is etched to havean island-like shape by a first etching and the first conductive film isetched to have an island-like shape by a second etching to form sourceand drain electrodes, and a ZnO semiconductor film is formed.

As shown in FIG. 2A, a gate electrode 3 is formed. The thickness of thegate electrode may be 10 to 200 nm over a substrate 1. The substrate 1may be formed by using the material shown in Embodiment 1. Here, a glasssubstrate is used.

An insulating film 2 containing silicon oxide (SiOx), silicon nitride(SiNx), silicon oxynitride (SiOxNy) (x>y), silicon nitride oxide(SiNxOy) (x>y), or the like may be formed with a thickness of 10 to 200nm by CVD or sputtering so as to prevent impurity or the like fromdiffusing from the substrate side (FIG. 2B).

The insulating film 2 may be formed by processing the surface of thesubstrate 1 with high density plasma. For example, the high densityplasma can be generated using a microwave of 2.45 GHz, and it is onlyrequired that electron density ranges from 1×10¹¹ to 1×10¹³/cm³, andelectron temperature is 2 eV or less. Such high density plasma has a lowkinetic energy of active species and a film with fewer defects can beformed with less damage caused by plasma compared to a conventionalplasma treatment.

The surface of the substrate 1 can be nitrided by the high densityplasma treatment under a nitriding atmosphere such as an atmospherecontaining nitrogen and a noble gas, an atmosphere containing nitrogen,hydrogen and a noble gas, and an atmosphere containing ammonia and anoble gas. In the case where a glass substrate is used as the substrate1 subjected to a nitriding treatment by the high density plasma, as anitride film formed over the surface of the substrate 1, the insulatingfilm 2 containing silicon nitride as a main component can be formed. Theinsulating film 2 may be formed by using a plurality of layers in whicha silicon oxide film or a silicon oxynitride film is formed by plasmaCVD over the nitride film.

In addition, a nitride film can be formed by nitriding over the surfaceof the insulating film 2 with high density plasma similarly.

The nitride film formed by nitriding with high density plasma cansuppress diffusion of impurity from the substrate 1.

The gate electrode 3 can be formed by using materials shown inEmbodiment 1. Here, an AlNd (aluminum neodymium) film is formed bysputtering using an AlNd target and processed into an island-like shape.A photolithography method is used for processing the film into anisland-like shape, and dry etching or wet etching is used.

After cleaning the surface of the gate electrode 3 and the surface ofthe substrate 1 or the insulating film 2, a gate insulating film 5 isformed with a thickness of 10 to 200 nm using a known CVD or sputteringover the gate electrode 3 (FIGS. 2A and 2B). The surface cleaning stepand the formation step of the gate insulating film 5 may be carried outcontinuously without being exposed to air. In the case where an Al filmis used for the gate electrode 3, when the gate insulating film 5 isformed at a high temperature, a hillock is generated in some cases.Thus, it is preferable to form the film at a low temperature of 500° C.or less, preferably 350° C. or less.

The gate insulating film 5 can be formed by using the material shown inEmbodiment 1. Here, a silicon oxide film is formed. Note that theinsulating film 2 is omitted in the drawings below.

A first conductive film 6 for source and drain electrodes is formed witha thickness of 10 to 200 nm on the gate insulating film 5. The firstconductive film 6 can be formed by using the material shown inEmbodiment 1. Here, an AlNi (aluminum nickel) film or an AlNd film isused. The first conductive film 6 can be formed by sputtering using anAlNi target or an AlNd target. After forming the gate insulating film 5,the first conductive film 6 may be formed continuously without beingexposed to the air.

A second conductive film 7 is formed with a thickness of 10 to 200 nm onthe first conductive film 6 (FIG. 2C). The second conductive film 7 canbe formed by using the material shown in Embodiment 1. Here, ZnO (zincoxide) to which an impurity such as Al or Ga is added is used.Consequently, an ohmic contact can be easily created between the secondconductive film 7 and a ZnO film which is formed as a semiconductorlayer later. The second conductive film 7 can be formed by sputtering.For example, the following methods can be used for adding Al or Ga:sputtering using a ZnO target to which 1 to 10 weight % of Al or Ga isadded; or sputtering in which an Al or Ga chip is mounted on a ZnOtarget at 200 to 300° C.

After forming the first conductive film 6, the second conductive film 7may be formed continuously without being exposed to the air. Therefore,formation from the gate insulating film 5 to the second conductive film7 may be continuously carried out without being exposed to air.

A third conductive film 8 may be formed with a thickness of 10 to 200 nmbetween the first conductive film 6 and the second conductive film 7(FIG. 2D). A contact resistance is occasionally increased between thefirst conductive film 6 and the second conductive film 7 depending on aheat treatment temperature in a manufacturing process. However, thecontact resistance can be reduced between the first conductive film 6and the second conductive film 7 by forming the third conductive film 8.The third conductive film 8 can be formed by using a metal film such asa Ti film which is formed by sputtering or the like.

A resist mask 9 is formed over the second conductive film 7, and thesecond conductive film 7 is etched (FIGS. 3A and 3B). In the case ofusing wet etching, buffered fluoric acid (in which HF (hydrofluoricacid) and NH₄F (ammonium fluoride) are mixed), for example, solutionwith a ratio of HF:NH₄F (weight ratio)=1:100 to 1:10 is used.

In the case of using dry etching, anisotropic plasma etching using CH₄gas can be used.

Under the second conductive film 7, the first conductive film 6 isformed. Thus, the first conductive film 6 serves as an etching stopperwhen the second conductive film 7 is etched. Consequently, source anddrain electrodes can be formed without damaging the gate insulating film5 in etching.

A part of the first conductive film 6 may be etched when the secondconductive film 7 is etched. However, attention is required to be paidso as not to totally etch the first conductive film 6 because the gateinsulating film is damaged if the first conductive film 6 is totallyetched.

Next, a source electrode 10 and a drain electrode 11 are formed byetching the first conductive film 6 using the resist mask 9 (FIG. 3C).In this invention, the first conductive film 6 is etched using anorganic alkaline solution represented by TMAH (tetramethylammoniumhydroxide), which is a developer for a photoresist.

In the case of using an AlNi film for the first conductive film 6 andTMAH for etching solution, the etching ratio is approximately 300 nm/minat 30° C. On the other hand, the second conductive film 7 or the gateinsulating film 5 to which the above-mentioned material is used is notetched with TMAH. Consequently, the source electrode 10 and the drainelectrode 11 can be formed without damaging the gate insulating film 5.Further, the island-like shaped second conductive films 10 b and 11 bare not reduced in size. In this invention, the first conductive film 6can be etched using a developer which is used when a resist mask isformed without using a special etching solution. Consequently, cost isreduced and efficiency is increased.

The resist mask 9 is removed after forming the source electrode 10 andthe drain electrode 11.

A ZnO film is formed as a semiconductor film 12 with a thickness of 20to 200 nm by sputtering over the source electrode 10, the drainelectrode 11, and the gate insulating film 5 (FIG. 3D). For example, thefilm can be formed by sputtering using a ZnO target with a flow ratio ofoxygen/argon ranging from 30 to 20, at 200 to 300° C.

The semiconductor film 12 is etched by a photolithography method to forman island-like shaped semiconductor film 13 (FIG. 4A). A wet etchingmethod using a buffered fluoric acid or anisotropic dry etching methodusing CH₄ gas can be used.

Zno is commonly used in the semiconductor film 12 and the secondconductive films 10 b and 11 b, and it is difficult to obtain asufficient etching selectivity. However, since the second conductivefilm 7 is required to be formed in a portion in contact with thesemiconductor film 12, the second conductive film 7 may be etched in aportion out of contact with the semiconductor film 12, for example, awire portion. In the above-mentioned etching method, the secondconductive films 10 b and 11 b may be etched, but the first conductivefilms 10 a and 11 a are not etched. Consequently, the first conductivefilms 10 a and 11 a serve as wires, and the electrical connection withthe semiconductor device is ensured.

An insulating film 14 is formed with a thickness of 50 nm to 1 μm over asemiconductor film 13 by CVD or sputtering (FIG. 4B). An insulating filmcontaining silicon as a main component can be formed as the insulatingfilm 14. An organic resin film or the like may be stacked over theinsulating film containing silicon. The insulating film 14 functions asa planarization film or a passivation film. Since Al is included in thesource electrode 10 and the drain electrode 11, a hillock isoccasionally generated when the insulating film 14 is formed at hightemperature. Thus, it is preferably formed at low temperature, 500° C.or less, preferably 350° C. or less.

Contact holes are formed in the insulating film 14, and conductive filmsin contact with the gate electrode 3, the source electrode 10, and thedrain electrode 11 are provided if necessary.

According to this invention, a semiconductor device can be formedwithout damaging the gate insulating film. An Al alloy film such as anAlNi film is used as the first conductive film, thereby achieving lowerresistance of the wire.

Embodiment 4

Here, a manufacturing method of a top gate semiconductor device isdescribed, in which an Al film or an Al alloy film is formed as a firstconductive film on a silicon oxide film or a silicon oxynitride film,and a ZnO film to which an n-type or p-type impurity is added is formedas a second conductive film, and then, the second conductive film isformed to have an island-like shape by a first etching, the firstconductive film is formed to have an island-like shape by a secondetching to form source and drain electrodes, a ZnO semiconductor film isformed, a gate insulating film is formed, and a gate electrode isformed. Note that it is needless to say that materials and methods formanufacture described in Embodiments 1 to 3 can be applied to those usedfor the present embodiment.

As shown in FIG. 5A, a silicon oxide (SiOx) film is formed as aninsulating film 20 over a substrate 1 with a thickness of 10 to 200 nmby CVD or sputtering. The insulating film 20 prevents impurity or thelike from diffusing from the substrate 1 side.

A first conductive film 21 for the source and drain electrodes is formedwith a thickness of 10 to 200 nm by sputtering or evaporation over theinsulating film 20. An Al alloy film such as AlNi (aluminum nickel) filmwhich is shown in Embodiment 1 can be used as the first conductive film21. After forming the insulating film 20, the first conductive film 21may be formed continuously without being exposed to the air.

A second conductive film 22 is formed with a thickness of 10 to 200 nmby sputtering on the first conductive film 21 (FIG. 5A). As the secondconductive film 22, ZnO (zinc oxide) to which a p-type or n-typeimpurity such as B (boron), Al (aluminum), Ga (gallium), P(phosphourus), or As (arsenic) is added can be used. After forming thefirst conductive film 21, the second conductive film 22 may be formedcontinuously without being exposed to the air. Therefore, the steps offorming the insulating film 20 to the second conductive film 22 may becarried out continuously without being exposed to the air.

A metal film such as a Ti film may be formed as a third conductive film23 with a thickness of 10 to 200 nm by sputtering between the firstconductive film 21 and the second conductive film 22 in order to reducethe contact resistance between the first conductive film 21 and thesecond conductive film 22 (FIG. 5B).

A resist mask 24 is formed over the second conductive film 22, and thesecond conductive film 22 is etched (FIG. 5C). Wet etching usingbuffered fluoric acid or dry etching using CH₄ gas can be used as anetching method.

The first conductive film 21 is formed under the second conductive film22. Therefore, the first conductive film 21 serves as an etching stopperwhen the second conductive film 22 is etched. Thus, the source and drainelectrodes can be formed without exposing the substrate 1 by etching theinsulating film 20.

When the second conductive film 22 is etched, a part of the firstconductive film 21 may be etched. Note that if all of the firstconductive film 21 is etched, the insulating film 20 is etched and thesubstrate 1 is exposed, which would cause diffusion of impurity includedin the substrate 1.

The first conductive film 21 is etched to form the source electrode 25and the drain electrode 26 (FIG. 5D). Wet etching using a developer fora photoresist, TMAH is used as an etching method. Thus, the sourceelectrode 25 and the drain electrode 26 can be formed without etchingthe insulating film 20. Further, the sizes of the island-like shapedsecond conductive films 25 b and 26 b are not reduced because the ZnOfilm is not etched by TMAH. Etching can be performed with a developerwhich is used in formation of a resist mask without a special etchingsolution for the first conductive film 21, which leads to cost reductionand improvement in efficiency.

After forming the source electrode 25 and the drain electrode 26, theresist mask 24 is removed.

A ZnO film is formed with a thickness of 20 to 200 nm by sputtering asthe semiconductor film 27 over the source electrode 25, the drainelectrode 26, and the insulating film 20 (FIG. 6A).

The semiconductor film 27 is etched by a photolithography method to makean island-like shaped semiconductor film 27. Wet etching using bufferedfluoric acid or dry etching using CH₄ gas can be used as an etchingmethod.

ZnO is commonly used for the semiconductor film 27 and the secondconductive films 25 b and 26 b, and it is difficult to obtain a highetching selectivity. However, the second conductive film may be etchedin the portion out of contact with the semiconductor film 27, speciallythe wire portion, because the second conductive film 22 may be formed inthe source and drain electrode portions, which is the same as Embodiment3.

A gate insulating film 28 is formed with a thickness of 10 to 200 nm byCVD or sputtering over the semiconductor film 27 (FIG. 6B). Thesemiconductor film 27 may be subjected to a high density plasmatreatment shown in the above-mentioned Embodiment to form a gateinsulating film. The surface of the semiconductor film 27 can benitrided by the high density plasma treatment under a nitridingatmosphere such as an atmosphere containing nitrogen and a noble gas; anatmosphere containing nitrogen, hydrogen, and a noble gas; and anatmosphere containing ammonia and a noble gas.

The gate insulating film 28 may be formed by using an insulating filmcontaining silicon as a main component, for example, a silicon oxidefilm, a silicon oxynitride film, a silicon nitride film, and a siliconnitride oxide film. In addition, it may be a single layer or a layeredfilm.

A gate electrode 29 is formed over the gate insulating film 28 (FIG.6B). The gate electrode 29 can be formed by using the material shown inthe above-mentioned embodiment, and may be a single layer or a layeredfilm including two or more layers. A known CVD sputtering, evaporation,or the like can be employed as a method for film formation. Dry etchingor wet etching method can be used for processing the gate electrode 29into an island-like shape with a photolithography method.

An insulating film 30 is formed with a thickness of 50 nm to 1 μm by CVDor sputtering over the gate electrode 29 and the gate insulating film 28(FIG. 6C). The insulating film 30 can be formed by using an insulatingfilm containing silicon. An organic resin film or the like may bestacked over the insulating film containing silicon. The insulating film30 functions as a planarization film or a passivation film. Since Al isincluded in the source electrode 25 and the drain electrode 26, ahillock is occasionally generated when the gate insulating film 28, thegate electrode 29, and the insulating film 30 are formed at a hightemperature. Thus, they are preferably formed at a low temperature, at500° C. or less, preferably 350° C. or less.

As described above, this invention can prevent an impurity fromdiffusing due to an exposure of the substrate 1. An Al alloy film suchas an AlNi film is used as the first conductive film, thereby achievinglower resistance of a wire.

Embodiment 5

Here, a description is made of a method of manufacturing a liquidcrystal display device using a bottom gate semiconductor device which isshown in Embodiments 1 and 3 referring to FIGS. 8A and 8B and 9A and 9B.Note that it is needless to say that the top gate semiconductor devicewhich is shown in Embodiments 2 and 4 can be applied. FIGS. 8A and 9Ashow cross-sectional views taken along line X-Y in FIG. 8B.

A gate wire 40 and an auxiliary capacitor wire 41 are formed over aglass substrate or a plastic substrate 1. An AlNd film is formed bysputtering, and then, formed by known photolithography method andetching.

A gate insulating film 42 formed by using a silicon oxide film or asilicon oxynitride film is formed by CVD or sputtering.

An AlNi film is formed as a first conductive film by sputtering over thegate insulating film 42. The first conductive film forms a sourceelectrode 45 a, a drain electrode 46 a and a source wire 47 later.

A ZnO (zinc oxide) film to which Al is added is formed as a secondconductive film by sputtering over the first conductive film. The secondconductive film forms a source electrode 45 b, a drain electrode 46 b,and a source wire 47 later.

A resist mask is formed in a region which is to be a source electrodeportion, a drain electrode portion, and a source wire portion, over thesecond conductive film (not shown in the figure). Then, the secondconductive film is etched. Here, etching is performed using bufferedfluoric acid and a solution of HF:NH₄F=1:100 (weight ratio).

Next, the first conductive film is etched using TMAH solution to formthe source electrode 45 a, the drain electrode 46 a, and the source wire47. After that, the resist mask is removed. Then, the source electrode45, the drain electrode 46, and the source wire 47 can be formed withoutdamaging the gate insulating film 42. In addition, since the ZnO film isnot etched by TMAH, the size of the island-like shaped second conductivefilm is not reduced. Further, since an AlNi film is used for the firstconductive film, the resistance of the source wire can be reduced.

Next, a semiconductor film 48 is formed. A ZnO film is formed bysputtering, and then, the semiconductor film 48 is formed from the ZnOfilm by a photolithography method and etching. Wet etching usingbuffered fluoric acid is used as etching. The portion of the secondconductive film out of contact with the semiconductor film 48 may bepartially removed here, because the first conductive film is formed in aportion to be a wire.

An insulating film 49 is formed by CVD, sputtering, coating, or the likeover the semiconductor film 48. The insulating film 49 can be formed byusing a layered film having an insulating film containing silicon, anorganic resin film, or the like. The insulating film 49 may be a filmwhich makes the unevenness of the surface planarized.

A contact hole leading to the drain electrode 46 and a contact hole forthe auxiliary capacitor are formed in the insulating film 49 using aphotolithography method and an etching method.

A transparent conductive film is formed by sputtering, and then, a pixelelectrode 50 is formed using a photolithography method and etching. Forexample, ITO (Indium Tin Oxide), ITSO (Indium Tin Oxide containingsilicon oxide), or IZO (Indium Zinc Oxide) may be used.

In the case of a reflective liquid crystal display device, a lightreflective metal material such as Ag (silver), Au (gold), Cu (copper), W(tungsten), or Al (aluminum) is formed instead of a transparentelectrode.

The portion where the pixel electrode 50 and the auxiliary capacitorwire 41 are overlapped forms an auxiliary capacitor 100 which is formedof the pixel electrode 50, the gate insulating film 42, and theauxiliary capacitor wire 41 (FIGS. 8A and 8B).

A corner of a bent portion or a portion where width changes may besmoothed and rounded in a wire and an electrode. A shape of a chamferedcorner can be realized by using a photomask pattern manufactured using apattern of photomask. This will have advantages described below. Whendry etching using plasma is performed, generation of fine particles dueto abnormal discharge can be suppressed by chamfering a projectingportion. Even though the fine particles are generated, the fineparticles can be prevented from accumulating at the corner at the timeof cleaning, and the fine particles can be washed away by chamfering aconcave portion. Thus, a problem of fine particles or dust in themanufacturing process can be solved and the yield can be improved.

An alignment film 51 is formed so as to cover the pixel electrode 50.The alignment film is formed by a droplet discharge method, printing, orthe like. After forming the alignment film, rubbing is conducted.

A color filter 55 is formed by using a colored layer and alight-shielding layer (black matrix), and a protective insulating film54 is formed on an opposing substrate 56. A transparent electrode 57 isformed, and an alignment film 53 is formed on the protective insulatingfilm 54 (FIG. 9A). The alignment film is subjected to a rubbing process.

Next, a closed pattern 75 of a sealant is formed by a droplet dischargemethod (FIG. 9B). A region surrounded by the sealant is filled withliquid crystal composition 52 (FIG. 9A).

After dropping the liquid crystal composition 52 in the closed pattern75, the opposing substrate 56 and a substrate 1 in which a semiconductordevice is formed are attached to each other. When the liquid crystalcomposition 52 is filled, the following alternative may be adopted: aseal pattern having an opening portion is provided on the substrate 1;the opposing substrate 56 and the substrate 1 are attached to eachother; then, liquid crystal is injected using capillary action.

As an alignment mode of the liquid crystal composition 52, TN mode inwhich the alignment of liquid crystal molecules is twisted at 90° fromthe side of light incidence to the side of light emission, FLC mode, IPSmode, or the like can be used. Note that an electrode pattern isdifferent from one shown in FIG. 8B and is a comb-like shape in the caseof the IPS mode.

Polarizing plates are attached to both of the opposing substrate 56 andthe substrate 1 on which the semiconductor device is formed. Inaddition, an optical film can be attached if required.

The distance between the opposing substrate 56 and the substrate 1 onwhich the semiconductor device is formed may be kept by dispersingspherical spacers or forming a columnar spacer formed of a resin, or bymixing fillers in the sealant. The aforementioned columnar spacer isformed of an organic resin material containing at least one of acrylic,polyimide, polyimide amide, or epoxy as a main component, or aninorganic material having one of silicon oxide, silicon nitride andsilicon oxide containing nitrogen, or a layered film thereof.

Then, an FPC (Flexible Printed Circuit) is attached to the substrate 1with an anisotropic conductive layer interposed therebetween using aknown technique.

A peripheral driver circuit may be formed over the substrate. A planeexemplary diagram is shown in FIG. 9B.

A gate wire driver circuit 62, a source wire driver circuit 63, and anactive matrix portion 64 are formed over a substrate 61 formed of glassor the like. The gate wire driver circuit 62 is constituted from atleast a shift register 62 a and a buffer 62 b. The source wire drivercircuit 63 is constituted from at least a shift register 63 a, a buffer63 b, and an analog switch 69 which samples video signals transmittedvia video lines 68. A plurality of gate wires 72 extended from the gatewire driver circuit 62 is arranged in parallel with each other in theactive matrix portion 64. A plurality of source wires 71 extended fromthe source wire driver circuit 63 is arranged orthogonally to the gatewires 72. In addition, an auxiliary capacitor wire 73 is arranged inparallel with the gate wires 72. In addition, a semiconductor device 65,a liquid crystal portion 66, and an auxiliary capacitor 67 are providedin a region surrounded by the gate wire 72, the source wires 71, and theauxiliary capacitor wire 73.

The gate wire driver circuit 62, the source wire driver circuit 63, andthe analog switch 69 are provided with a semiconductor devicemanufactured by the same manufacturing method as the semiconductordevice 65 to have a similar structure.

In the semiconductor device 65, a gate electrode is connected to thegate wire 72, and the source electrode is connected to the source wire71. A liquid crystal portion 66 is formed by introducing a liquidcrystal to be sealed between a pixel electrode connected to the drainelectrode of the semiconductor device 65 and an opposing electrode overthe opposing substrate. The auxiliary capacitor wire 73 is connected toan electrode having the same potential as the opposing electrode.

In the aforementioned liquid crystal display device, the gate insulatingfilm is not etched and the characteristics do not become unstable, andthus, high reliability is realized. In the case of using a top gatesemiconductor device, a glass substrate or a base film formed by using,a silicon oxide film or a silicon oxynitride film is not etched, so thatimpurity such as sodium is not diffused into a semiconductor film fromthe substrate and the characteristics are not deteriorated, and thus,high reliability can be realized.

Al is used for a part of the source electrode and the drain electrode,thereby achieving lower resistance of a wire.

Embodiment 6

Here, a description is made of a method for manufacturing alight-emitting device with using the bottom gate semiconductor deviceshown in Embodiments 1 and 3 referring to FIGS. 10A and 10B and 11A and11B. Note that it is needless to say that the semiconductor device ofEmbodiments 2 and 4 can be applied.

The semiconductor device is manufactured based on the description of theaforementioned embodiment, and formation to the stage shown in FIG. 10Ais carried out. Note that the same parts as those of the aboveembodiments are denoted by the same reference numerals.

In the EL display device, the pixel electrode 50 functions as an anodeor a cathode. As the material for the pixel electrode 50, the followingcan be employed: a conductive metal such as aluminum (Al), silver (Ag),gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr),molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd),lithium (Li), caesium (Cs), magnesium (Mg), calcium (Ca), strontium(Sr), or titanium (Ti); an alloy such as aluminum-silicon (Al—Si),aluminum-titanium (Al—Ti), or aluminum-silicon-copper (Al—Si—Cu);nitride of a metal material such as titanium nitride (TiN); a metalcompound such as ITO, ITO containing silicon, or IZO.

An electrode from which light emitted from an EL layer is extracted isonly required to be formed by using a light-transmitting conductivefilm, and a very thin film of metal such as Al or Ag may be used as wellas a metal compound such as ITO, ITO containing silicon, or IZO.

When light-emission is extracted from an electrode which is opposed tothe pixel electrode 50, a highly reflective material (Al, Ag, or thelike) can be used for the pixel electrode 50. In this embodiment, ITSO,which means ITO containing silicon, is used as the pixel electrode 50(FIG. 10A).

Next, an insulating film formed by using an organic material or aninorganic material is formed so as to cover the insulating film 49 andthe pixel electrode 50. Then, the insulating film is processed to exposethe pixel electrode 50 partially, thereby forming partition walls 81. Asthe material of the partition walls 81, a photosensitive organicmaterial (such as acrylic or polyimide) is preferable. Alternatively, anon-photosensitive organic material or inorganic material may also beused. Further, the partition walls 81 may be used as a black matrix bycoloring the partition walls 81 black in such a way that a black pigmentor dye such as titanium black or carbon nitride is dispersed into thematerial of the partition wall 81 with the use of a dispersant. It isdesirable that the partitions wall 81 have a tapered shape and those endsurfaces 81 a toward the pixel electrode have curvatures changingcontinuously (FIG. 10B).

Next, a layer 82 including a light-emitting substance is formed, and anopposing electrode 83 which covers the layer 82 including alight-emitting substance is formed. Then, a light-emitting element withthe layer 82 including a light-emitting substance interposed between thepixel electrode 50 and the opposing electrode 83 can be manufactured,and light-emission can be obtained by applying a voltage between theopposing electrode 83 and the pixel electrode 50.

As an electrode material used for forming the opposing electrode 83, amaterial similar to one which can be used for the pixel electrode can beused. In this embodiment, aluminum is used for a second electrode.

The layer 82 including a light-emitting substance is formed byevaporation, ink-jet, spin coating, dip coating, roll-to-roll method,sputtering, or the like.

In the case of an organic electroluminescent display device, the layer82 including a light-emitting substance may be a layered film of layershaving functions of hole transportation, hole injection, electrontransportation, electron injection, or light-emission, respectively, ora single layer of a light-emitting layer. As a layer including alight-emitting substance, a single layer or a layered film of an organiccompound may be used.

A hole injecting layer is provided between an anode and a holetransporting layer. As the hole injecting layer, a mixed layer of anorganic compound and a metal oxide can be used. This prevents shortcircuit between the pixel electrode 50 and the opposing electrode 83 dueto unevenness which is formed on the surface of the pixel electrode 50or a foreign substance which is left on the surface of the electrode.The thickness of the mixed layer is preferably 60 nm or more, morepreferably 120 nm or more. Since increase in thickness of a film doesnot cause increase in driving voltage, the thickness of the film can beselected such that the influence of the unevenness or foreign substancecan be covered sufficiently. Thus, a dark spot is not generated, anddriving voltage or power consumption is not increased in thelight-emitting device manufactured by this invention.

An oxide or a nitride of transition metal is preferable as a metaloxide, concretely, zirconium oxide, hafnium oxide, vanadium oxide,niobium oxide, tantalum oxide, chromium oxide, molybdenum oxide,tungsten oxide, titanium oxide, manganese oxide, and rhenium oxide.

As an organic compound, the following can be employed: an organicmaterial having an arylamino group such as4,4′-bis[N-(1-napthyl)-N-phenylamino]biphenyl (NPB),4,4′-bis[N-(3-methylphenyl]-N-phenylamino]biphenyl (TPD),4,4′,4″-tris(N,N-diphenylamino)triphenylamine (TDATA),4,4′,4″-tris[N-(3-methylphenyl)-N-phenylamino]triphenylamine (MTDATA),4,4′-bis{N-[4-(N,N-di-m-tolylamino)phenyl]-N-phenylamino}biphenyl(DNTPD), 1,3,5-tris[N,N-di(m-tolyl)amino]benzene (m-MTDAB), and4,4′,4″-tris(N-carbazolyl) triphenylamine (TCTA); phthalocyanine (H₂Pc);copper phthalocyanine (CuPc); vanadyl phthalocyanine (VOPc); or thelike.

The hole transporting layer is provided between the anode and alight-emitting layer, or between the hole injecting layer and thelight-emitting layer when the hole injecting layer is provided. The holetransporting layer is formed by using a layer which has an excellentproperty of transporting a hole, for example, a layer formed by using acompound of aromatic amine (that is, having a benzene ring-nitrogenbond) such as NPB, TPD, TDATA, MTDATA, and BSPB. The substancesmentioned here have the hole mobility of 1×10⁻⁶ to 10 cm²/Vs mainly.Note that a substance having higher transporting property of holes thanelectrons may be used as well as the materials. Note that the holetransporting layer may be formed by not only a single layer but also alayered film in which two or more layers formed from the above mentionedsubstances are stacked.

The light-emitting layer is provided between the anode and the cathode,or between the hole transporting layer and the electron transportinglayer when the hole transporting layer and the electron transportinglayer are provided. There is no particular limitation on thelight-emitting layer; however, a layer serving as the light-emittinglayer has two modes roughly. One is a host-guest type layer whichincludes a dispersed light-emitting substance in a layer formed of amaterial (host material) having a larger energy gap than an energy gapof a light-emitting substance (dopant material) which becomes aluminescent center, while the other is a layer in which a light-emittinglayer is made of a light-emitting substance only. The former ispreferable, because concentration quenching hardly occurs. As thelight-emitting substance to be a luminescent center, the following canbe employed:4-dicyanomethylene-2-methyl-6-(1,1,7,7-tetramethyljulolidyl-9-enyl)-4H-pyran(DCJT);4-dicyanomethylene-2-t-butyl-6-(1,1,7,7-tetramethyljulolidine-9-enyl)-4H-pyran;periflanthene;2,5-dicyano-1,4-bis(10-methoxy-1,1,7,7-tetramethyljulolidine-9-enyl)benzene;N,N′-dimethylquinacridone (DMQd); coumarin 6; coumarin 545T;tris(8-quinolinolato)aluminum (Alq₃); 9,9′-bianthryl;9,10-diphenylanthracene (DPA); 9,10-bis(2-naphthyl)anthracene (DNA);2,5,8,11-tetra-t-butylperylene (TBP); PtOEP; Ir(ppy)₃; Btp₂Ir(acac);FIrpic; or the like. As the base material to be a host material in thecase of forming the layer in which the light-emitting substance isdiffused, the following can be used: an anthracene derivative such as9,10-di(2-naphtyl)-2-tert-butylanthracene (t-BuDNA); a carbazolederivative such as 4,4′-bis(N-carbazolyl)biphenyl (CBP); or a metalcomplex such as tris(8-quinolinolato)aluminum (Alq₃),tris(4-methyl-8-quinolinolato)aluminum (Almq₃);bis(10-hydroxybenzo[h]-quinolinato)beryllium (BeBq₂);bis(2-methyl-8-quinolinolato)-4-phenylphenolato-aluminum (BAlq);bis[2-(2-hydroxyphenyl)pyridinato]zinc (Znpp₂); orbis[2-(2-hydroxyphenyl)benzoxazolate]zinc (ZnBOX). As the material whichcan constitute the light-emitting layer only with a light-emittingsubstance, tris(8-quinolinolato)aluminum (Alq₃),9,10-bis(2-naphtyl)anthracene (DNA),bis(2-methyl-8-quinolinolato)-4-phenylphenolato-aluminum (BAlq), or thelike can be used.

An electron transporting layer is provided between the light-emittinglayer and the cathode, or between the light-emitting layer and anelectron injecting layer when the electron injecting layer is provided.The electron transporting layer is a layer having an excellent electrontransporting property, and for example, a layer formed using a metalcomplex having a quinoline skeleton or a benzoquinoline skeleton such astris(8-quinolinolato)aluminum (Alq₃),tris(5-methyl-8-quinolinolato)aluminum (Almq₃),bis(10-hydroxybenzo[h]-quinolinato)beryllium (BeBq₂), andbis(2-methyl-8-quinolinolato)-4-phenylphenolato-aluminum (BAlq). Inaddition, a metal complex having an oxazole ligand or a thiazole ligandsuch as bis[2-(2-hydroxyphenyl)-benzoxazolato]zinc (Zn(BOX)₂),bis[2-(2-hydroxyphenyl)-benzothiazolato]zinc (Zn(BTZ)₂), or the like canbe used. In addition to the metal complexes,2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (PBD);1,3-bis[5-(p-tert-butylphenyl)-1,3,4-oxadiazole-2-yl]benzene (OXD-7);3-(4-tert-butylphenyl)-4-phenyl-5-(4-biphenylyl)-1,2,4-triazole (TAZ);3-(4-tert-butylphenyl)-4-(4-ethylphenyl)-5-(4-biphenylyl)-1,2,4-triazole(p-EtTAZ); bathophenanthroline (BPhen); bathocuproine (BCP); or the likecan be used. These substances mentioned here mainly have the electronmobility of 1×10⁻⁶ to 10 cm²/Vs. Note that other substance may be usedfor the electron transporting layer so long as it has a higher electrontransporting property than a hole transporting property. Further, theelectron transporting layer may be formed by not only a single layer butalso a layered film in which two or more layers made from the abovementioned substances are stacked.

The electron injecting layer is provided between the cathode and theelectron transporting layer. As the electron injecting layer, a compoundof alkali metal or alkaline earth metal such as lithium fluoride (LiF),cesium fluoride (CsF), or calcium fluoride (CaF₂) can be employed. Inaddition to that, a layer formed by using an electron transportingsubstance which contains alkali metal or alkaline earth metal, forexample, Alq₃ containing magnesium (Mg) or the like can be used.

In the case of an inorganic electroluminescent display device, one inwhich a fluorescent substance particles are diffused in dispersing agentfor the layer 82 including a light-emitting substance can be used.

A fluorescent substance in which a donor impurity such as Cl (chlorine),I (iodine), or Al (aluminum) is added with Cu (copper) in ZnS can beused.

As the dispersing agent, the following can be employed: a polymer havinga relatively high dielectric constant such as cyanoethyl cellulose basedresin, polyethylene based resin, polypropylene based resin, polystyrenebased resin, silicone resin, epoxy resin, vinylidene fluoride resin, orthe like. The dielectric constant can be adjusted by mixing the resinand minute particles having high dielectric constant such as BaTiO₃(barium titanate) or SrTiO₃ (strontium titanate). As a diffusing means,an ultrasonic diffusing machine or the like can be used.

A dielectric layer may be provided between the layer 82 including alight-emitting substance and one of the electrodes. For the dielectriclayer, a highly dielectric and insulating material which has a highdielectric breakdown voltage is employed. One is selected from a metaloxide or nitride, for example, TiO₂, BaTiO₃, SrTiO₃ PbTiO₃, KNbO₃,PbNbO₃, Ta₂O₃, BaTa₂O₆, LiTaO₃, Y₂O₃, Al₂O₃, ZrO₂, AlON, ZnS, or thelike. Those may be disposed as a uniform film or a film having aparticle structure.

In the case of an inorganic electroluminescent display device, adouble-insulating structure in which a light-emitting layer isinterposed between insulating layers may be employed. The light-emittinglayer can be formed by using a II-VI compound such as Mn (manganese) orZnO (zinc sulfide) containing a rare earth element, and the insulatinglayer can be formed by using oxide or nitride such as Si₃N₄, SiO₂,Al₂O₃, or TiO₂.

A silicon oxide film containing nitrogen is formed as a passivation filmover the opposing electrode 83 by plasma CVD (not shown). In the case ofusing a silicon oxide film containing nitrogen, the following can beused: a silicon oxynitride film formed by using SiH₄, N₂O, and NH₃ byplasma CVD; a silicon oxynitride film formed by using SiH₄, and N₂O; ora silicon oxynitride film formed by using a gas in which SiH₄ and N₂O isdiluted with Ar.

A silicon oxide nitride hydride film manufactured from SiH₄, N₂O, and H₂may be employed as a passivation film. Note that a passivation film isnot limited to the aforementioned substance. Another insulating filmcontaining silicon as a main component can be also used. In addition, alayered film structure may be employed as well as a single layerstructure. Further, a multilayer film of a carbon nitride film and asilicon nitride film or a multilayer film of a styrene polymer can beused. A silicon nitride film or a diamond-like carbon film may beformed.

Then, a display portion is sealed to protect a light-emitting elementfrom a material such as water which promotes deterioration. In the caseof using an opposing substrate for sealing, the opposing substrate isattached by using an insulating sealant so as to expose an externalconnection portion. A space between the opposing substrate and anelement substrate may be filled with an inert gas such as dry nitrogen,or the opposing substrate may be attached by applying a sealant to thepixel portion entirely. It is preferable to use an ultraviolet curingresin or the like as the sealant. A drying agent or particles forkeeping the gap between the substrates constant may be mixed in thesealant. Then, the light-emitting device is completed by attaching aflexible wire board to the external connection portion.

One example of a structure of the light-emitting device manufactured asdescribed above is shown referring to FIGS. 11A and 11B. Note thatportions having the same functions are sometimes denoted by the samereference numerals even though they have different shapes, and theexplanations are occasionally omitted.

FIG. 11A shows a structure in which the pixel electrode 50 is formedusing a light transmitting conductive film, and light generated in thelayer 82 including a light-emitting substance is emitted toward asubstrate 1. Further, reference numeral 86 denotes an opposingsubstrate. This opposing substrate is firmly attached to the substrate 1using a sealant or the like after forming a light emitting element. Aspace between the opposing substrate 86 and the element is filled withresin 85 having a light-transmitting property or the like to seal thelight emitting element. Accordingly, the light emitting element can beprevented from being deteriorated by moisture or the like. Preferably,the resin 85 has a hygroscopic property. More preferably, a drying agent84 with a high light-transmitting property is dispersed in the resin 85to prevent the adverse influence of moisture.

FIG. 11B shows a structure in which both the pixel electrode 50 and anopposing substrate 83 are formed by using conductive films havinglight-transmitting property. Accordingly, light can be emitted towardboth the substrate 1 and the opposing substrate 86 as shown by an arrowof dotted lines. In this structure, by providing polarizing plates 88outside of the substrate 1 and the opposing substrate 86, a screen canbe prevented from being transparent, thereby improving visibility.Protection films 87 are preferably provided outside of the polarizingplates 88.

The light-emitting device of this invention having a display functionmay employ either an analog video signal or a digital video signal. If adigital video signal is used, the video signal may use either a voltageor a current.

When the light-emitting element emits light, a video signal to beinputted to a pixel may have either a constant voltage or a constantcurrent. When a video signal has a constant voltage, a constant voltageis applied to a light-emitting element or a constant current flowsthrough the light-emitting element.

Also, when a video signal has a constant current, a constant voltage isapplied to a light-emitting element or a constant current flows throughthe light-emitting element. A driving method where a constant voltage isapplied to a light-emitting element is called a constant voltage drive.Meanwhile, a driving method where a constant current flows through alight-emitting element is called a constant current drive. In theconstant current drive, constant current flows regardless of change inresistance of a light emitting element. The light emitting displaydevice according to this invention and the driving method thereof mayuse any one of the aforementioned methods.

In the light-emitting device, a gate insulating film is not etched, andthe characteristics of the light-emitting element is not unstable sothat its reliability is high. In the case of using a top gatesemiconductor device, since a glass substrate or a base film formed byusing, a silicon oxide film or a silicon oxynitride film is not etched,impurity such as sodium which deteriorates characteristics is notdiffused from the substrate into the semiconductor film so that highreliability is obtained.

Al is used for a part of the source electrode and the drain electrode,thereby achieving lower resistance of a wire.

A pixel circuit and a protective circuit included in a panel and module,and operation thereof are shown referring to FIGS. 12A to 12F and 13 orthe like. FIGS. 10A and 10B and 11A and 11B each show a cross-sectionalview of a driving TFT 1403 of the semiconductor device. A switching TFT1401, a current control TFT 1404, and an eraser TFT 1406 may bemanufactured at the same time of the driving TFT 1403, and may have thesame structure as the driving TFT 1403.

A pixel shown in FIG. 12A includes a signal line 1410 and power sourcelines 1411 and 1412 arranged in a column direction and a scan line 1414arranged in a row direction. The pixel further includes a switching TFT1401, the driving TFT 1403, the current control TFT 1404, an auxiliarycapacitor 1402, and a light-emitting element 1405.

A pixel shown in FIG. 12C has the same structure as one in FIG. 12Aexcept for that the gate electrode of the driving TFT 1403 is connectedto the power source line 1412 provided in the row direction. In otherwords, the pixels shown in FIGS. 12A and 12C have the same equivalentcircuit diagram. However, a power source line formed in the case ofarranging the power source line 1412 in the column direction (FIG. 12A)is formed by using a conductive layer in a different layer from a layerin which a power source line is formed by using a conductive layer inthe case of arranging the power source line 1412 in the row direction(FIG. 12C). Here, attention is paid to a wire connected to the gateelectrode of the driving TFT 1403, and the structure is shown separatelyin FIGS. 12A and 12C in order to show that these wires are manufacturedwith different layers.

As a feature of the pixels shown in FIGS. 12A and 12C, the driving TFT1403 and the current control TFT 1404 are connected serially within thepixel, and it is preferable to set the channel length L (1403) and thechannel width W (1403) of the driving TFT 1403, and the channel length L(1404) and the channel width W (1404) of the current control TFT 1404 soas to satisfy L (1403)/W (1403):L (1404)/W (1404)=5 to 6000:1.

The driving TFT 1403 operates in a saturation region and serves tocontrol the current value of the current flowing into the light-emittingelement 1405. The current control TFT 1404 operates in a linear regionand serves to control the current supplied to the light-emitting element1405. Both the TFTs preferably have the same conductivity type in themanufacturing process, and the TFTs are n-channel type TFTs in thisembodiment. The driving TFT 1403 may be either an enhancement mode TFTor a depletion mode TFT. Since the current control TFT 1404 operates inthe linear region in the light-emitting device having the abovestructure, slight fluctuation of Vgs of the current control TFT 1404does not affect the current value of the light-emitting element 1405.That is to say, the current value of the light-emitting element 1405 canbe determined by the driving TFT 1403 operating in the saturationregion. With the above structure, the variation of the luminance of thelight-emitting element due to the variation of the characteristics ofthe TFT can be remedied, thereby providing a light-emitting devicehaving improved image quality.

In each pixel shown in FIGS. 12A to 12D, the switching TFT 1401 is tocontrol the input of the video signal to the pixel, and the video signalis inputted into the pixel when the switching TFT 1401 is turned on.Then, the voltage of the video signal is held in the auxiliary capacitor1402. Although FIGS. 12A and 12C show the structure in which theauxiliary capacitor 1402 is provided, this invention is not limitedthereto. When the gate capacitance and the like can serve as a capacitorholding the video signal, the auxiliary capacitor 1402 is notnecessarily provided.

A pixel shown in FIG. 12B has the same pixel structure as that in FIG.12A except for that a TFT 1406 and a scan line 1415 are added. In thesame way, a pixel shown in FIG. 12D has the same pixel structure as thatin FIG. 12C expect for that the TFT 1406 and the scan line 1415 areadded.

ON and OFF of the TFT 1406 is controlled by the additionally providedscan line 1415. When the TFT 1406 is turned on, the charge held in theauxiliary capacitor 1402 is discharged, thereby turning off the currentcontrol TFT 1404. In other words, by the provision of the TFT 1406, astate can be produced compellingly in which the current does not flowinto the light-emitting element 1405. For this reason, the TFT 1406 canbe referred to as an eraser TFT. Consequently, in the structures shownin FIGS. 12B and 12D, a lighting period can be started at the same timeas or just after the start of a writing period before the writing of thesignal into all the pixels; therefore the duty ratio can be increased.

In a pixel shown in FIG. 12E, the signal line 1410 and the power sourceline 1411 are arranged in the column direction, and the scan line 1414is arranged in the row direction. Further, the pixel includes theswitching TFT 1401, the driving TFT 1403, the auxiliary capacitor 1402,and the light-emitting element 1405. A pixel shown in FIG. 12F has thesame pixel structure as that shown in FIG. 12E except for that the TFT1406 and the scan line 1415 are added. In the structure shown in FIG.12F, the duty ratio can also be increased by the provision of the TFT1406.

Such an active matrix light-emitting device can be driven at low voltagewhen the pixel density increases, because the TFTs are provided inrespective pixels. Therefore, it is considered that the active matrixlight-emitting device is advantageous.

Although this embodiment described the active matrix light-emittingdevice in which the respective TFTs are provided in respective pixels, apassive matrix light-emitting device can also be formed. Since the TFTsare not provided in respective pixels in the passive matrixlight-emitting device, high aperture ratio can be obtained. In the caseof a light-emitting device in which light is emitted to both sides ofthe light emission stack, the transmissivity of the passive matrixlight-emitting device is increased.

Subsequently, a case will be described in which a diode is provided as aprotective circuit on the scan line and the signal line with the use ofan equivalent circuit shown in FIG. 12E.

In FIG. 13, the switching TFT 1401, the driving TFT 1403, the auxiliarycapacitor 1402, and the light-emitting element 1405 are provided in apixel area 1500. Diodes 1561 and 1562 are provided on the signal line1410. In the similar way to the switching TFT 1401 and the driving TFT1403, the diodes 1561 and 1562 are manufactured based on the aboveembodiments, and have a gate electrode, a semiconductor layer, a sourceelectrode, a drain electrode, and the like. The diodes 1561 and 1562 areoperated as diodes by connecting the gate electrode with the drainelectrode or the source electrode.

Common potential lines 1554 and 1555 connecting to the diodes 1561 and1562 are formed by using the same layer as the gate electrode.Therefore, in order to connect the common potential lines 1554 and 1555with the source electrode or the drain electrode of the diode, it isnecessary to form a contact hole in the gate insulating layer.

Diodes 1563 and 1564 provided on the scan line 1414 have a similarstructure. Further, common potential lines 1565 and 1566 has the similarstructure.

In this manner, protection diodes can be simultaneously formed in aninput stage according to this invention. Further, the positions of theprotection diodes are not limited to this, and they can be providedbetween a driver circuit and a pixel.

A top view of a pixel portion in the case of using an equivalent circuitshown in FIG. 12E is described in FIG. 14A. In addition, the sameequivalent circuit as that in FIG. 12E is shown in FIG. 14B. Eachsemiconductor device shown in FIGS. 10A, 10B, 11A, and 11B iscorresponds to each driving TFT 1403. FIGS. 10A, 10B, 11A and 11B showcross-sectional views taken along line X-Y in FIGS. 14A and 14B. Thepower source line 1411, the signal line 1410, and the source electrodeand the drain electrode of the switching TFT 1401 are formed by usingthe first conductive film, and the source electrode and the drainelectrode of the driving TFT 1403 are formed by using the secondconductive film.

The switching TFT 1401 is manufactured by the same method as the drivingTFT 1403. The drain electrode of the switching TFT 1401 and a gateelectrode 40 of the driving TFT 1403 are connected electrically witheach other through a contact hole formed in an insulating film in thesame layer as the gate insulating film 42.

The auxiliary capacitor 1402 is formed by using a portion where the gateelectrode of the driving TFT 1403 is extended, the power source line1411, and an insulating film in the same layer as the gate insulatingfilm 42.

A light-emitting region 1420 is formed in an opening portion of apartition wall 81. The partition wall 81 is formed in the vicinity ofthe light-emitting region 1420, although it is not shown. The cornerportion of the light-emitting region 1420 may be rounded. By making thecorner portion of the opening portion of the partition wall 81 rounded,the corner portion of the light-emitting region 1420 can be rounded.When dry etching using plasma is performed to process the partition wall81, generation of fine particles due to abnormal discharge can besuppressed by making the corner portion rounded.

This embodiment can be combined with a suitable structure of the aboveembodiments as appropriate.

Embodiment 7

As an electronic device having semiconductor devices according to thisinvention mounted with modules shown as examples in the aboveembodiments, a camera such as a video camera or a digital camera; agoggle type display (a head mounted display); a navigation system; anaudio reproducing device (e.g., a car audio component); a computer; agame machine; a portable information terminal (e.g., a mobile computer,a cellular phone, a portable game machine, an electronic book, or thelike); an image reproducing device equipped with a recording medium(specifically, a device which can reproduce the content of a recordingmedium such as a digital versatile disc (DVD) and which has a displayfor displaying an image stored therein); and the like can be given.Specific examples of these electronic appliances are shown in FIGS. 15Ato 15E, and FIG. 16.

FIG. 15A shows a monitor for a television receiver or a personalcomputer, or the like, including a housing 3001, a display area 3003,speakers 3004, and the like. An active matrix display device is providedin the display area 3003. Each pixel of the display area 3003 includes asemiconductor device manufactured in accordance with this invention. Byusing the semiconductor device of this invention with this structure, atelevision with less characteristic deterioration can be obtained.

FIG. 15B shows a cellular phone, including a main body 3101, a housing3102, a display area 3103, an audio input portion 3104, an audio outputportion 3105, operation keys 3106, an antenna 3108, and the like. Anactive matrix display device is provided in the display area 3103. Eachpixel of the display area 3103 includes a semiconductor devicemanufactured in accordance with this invention. By using thesemiconductor device of this invention with this structure, a cellularphone with less characteristic deterioration can be obtained.

FIG. 15C shows a computer, including a main body 3201, a housing 3202, adisplay area 3203, a keyboard 3204, an external connection port 3205, apointing mouse 3206, and the like. An active matrix display device isprovided in the display area 3203. Each pixel of the display area 3203includes a semiconductor device manufactured in accordance with thisinvention. By using the semiconductor device of this invention with thisstructure, a computer with less characteristic deterioration can beobtained.

FIG. 15D shows a mobile computer, including a main body 3301, a displayarea 3302, a switch 3303, operation keys 3304, an infrared port 3305,and the like. An active matrix display device is provided in the displayarea 3302. Each pixel of the display area 3302 includes a semiconductordevice manufactured in accordance with this invention. By using thesemiconductor device of this invention with this structure, a mobilecomputer with less characteristic deterioration can be obtained.

FIG. 15E shows a portable game machine, including a housing 3401, adisplay area 3402, speakers 3403, operation keys 3404, a recordingmedium insert portion 3405, and the like. An active matrix displaydevice is provided in the display area 3402. Each pixel of the displayarea 3402 includes a semiconductor device manufactured in accordancewith this invention. By using the semiconductor device of this inventionwith this structure, a portable game machine with less characteristicdeterioration can be obtained.

FIG. 16 shows a flexible display, including a main body 3110, a pixelarea 3111, a driver IC 3112, a receiving device 3113, a film buttery3114, and the like. The receiving device can receive a signal from aninfrared communication port 3107 of the above described cellular phone.An active matrix display device is provided in the pixel area 3111. Eachpixel of the pixel area 3111 includes a semiconductor devicemanufactured in accordance with this invention. By using thesemiconductor device of this invention with this structure, a flexibledisplay with less characteristic deterioration can be obtained.

As set forth above, the application range of this invention is extremelywide, and this invention can be applied to electronic devices in allfields.

The present application is based on Japanese Patent Application serialNo. 2005-329806 filed on Nov. 15, 2005 in Japanese Patent Office, theentire contents of which are hereby incorporated by reference.

1. A method of manufacturing a semiconductor device including a channelformation region and a gate insulating film adjacent to the channelformation region, the method comprising: forming the gate insulatingfilm by using a microwave, wherein the channel formation regioncomprises an oxide semiconductor material.
 2. The method according toclaim 1 wherein the microwave has a frequency of 2.45 GHz.
 3. The methodaccording to claim 1 wherein the semiconductor device is a top gatesemiconductor device in which the gate insulating film is formed overthe channel formation region.
 4. The method according to claim 1 whereinthe gate insulating film comprises a material selected from the groupconsisting of silicon oxide, silicon nitride, silicon oxynitride, andsilicon nitride oxide.
 5. The method according to claim 1 wherein theoxide semiconductor material includes zinc oxide.
 6. A method ofmanufacturing a semiconductor device including a channel formationregion and a gate insulating film adjacent to the channel formationregion, the method comprising: forming the gate insulating film by usinga plasma having an electron density from 1×10¹¹ to 1×10¹³/cm³, whereinthe channel formation region comprises an oxide semiconductor material.7. The method according to claim 6 wherein the semiconductor device is atop gate semiconductor device in which the gate insulating film isformed over the channel formation region.
 8. The method according toclaim 6 wherein the gate insulating film comprises a material selectedfrom the group consisting of silicon oxide, silicon nitride, siliconoxynitride, and silicon nitride oxide.
 9. The method according to claim6 wherein the oxide semiconductor material includes zinc oxide.
 10. Amethod of manufacturing a semiconductor device including a channelformation region and a gate insulating film adjacent to the channelformation region, the method comprising: forming the gate insulatingfilm by using a plasma having an electron temperature 2 eV or less,wherein the channel formation region comprises an oxide semiconductormaterial.
 11. The method according to claim 10 wherein the semiconductordevice is a top gate semiconductor device in which the gate insulatingfilm is formed over the channel formation region.
 12. The methodaccording to claim 10 wherein the gate insulating film comprises amaterial selected from the group consisting of silicon oxide, siliconnitride, silicon oxynitride, and silicon nitride oxide.
 13. The methodaccording to claim 10 wherein the oxide semiconductor material includeszinc oxide.
 14. A method of manufacturing a semiconductor deviceincluding a channel formation region and a gate insulating film adjacentto the channel formation region, the method comprising: forming the gateinsulating film by using a plasma generated by using a microwave, theplasma having an electron density from 1×10¹¹ to 1×10¹³/cm³, wherein thechannel formation region comprises an oxide semiconductor material. 15.The method according to claim 10 wherein the semiconductor device is atop gate semiconductor device in which the gate insulating film isformed over the channel formation region.
 16. The method according toclaim 10 wherein the gate insulating film comprises a material selectedfrom the group consisting of silicon oxide, silicon nitride, siliconoxynitride, and silicon nitride oxide.
 17. The method according to claim10 wherein the oxide semiconductor material includes zinc oxide.
 18. Amethod of manufacturing a semiconductor device including a channelformation region and a gate insulating film adjacent to the channelformation region, the method comprising: forming the gate insulatingfilm by using a plasma generated by using a microwave, the plasma havingan electron temperature 2 eV or less, wherein the channel formationregion comprises an oxide semiconductor material.
 19. The methodaccording to claim 18 wherein the semiconductor device is a top gatesemiconductor device in which the gate insulating film is formed overthe channel formation region.
 20. The method according to claim 18wherein the gate insulating film comprises a material selected from thegroup consisting of silicon oxide, silicon nitride, silicon oxynitride,and silicon nitride oxide.
 21. The method according to claim 18 whereinthe oxide semiconductor material includes zinc oxide.